This article presents a detailed design of an Ethernet interface circuit based on the Samsung ARM9 chip S3C2440 embedded system. It utilizes the industrial-grade Ethernet controller DM9000AEP to achieve efficient data exchange within the embedded system. The paper also explores the driver and registry configurations of the Windows CE operating system, focusing on how it manages the DM9000AEP network interface. By integrating this hardware with the software layer, the system is capable of supporting reliable and high-speed network communication.

With the rapid advancement in microelectronics and computer technologies, embedded systems have become essential in modern industrial control, communication, and consumer electronics. Ethernet has gained widespread attention due to its real-time performance, reliability, standardization, ease of installation, and maintenance. It is not limited by transmission distance, making it a preferred choice for many researchers in monitoring and control systems globally. This paper introduces a design that combines the DM9000AE network interface chip with the 32-bit Samsung ARM9 processor S3C2440, enabling network access through a developed driver on the Windows CE platform.

2. Working Principle of DM9000AE

2.1 Main Features and Overall Structure of DM9000

The DM9000AE is a 10/100 Mbps Fast Ethernet controller developed by Devicom (Lianjie International, Taiwan). It integrates both the Media Access Control (MAC) and Physical Layer (PHY) functions, including frame assembly and disassembly, transmission and reception, address recognition, CRC encoding and checking, MLT-3 encoding, noise suppression, pulse shaping, timeout retransmission, link integrity testing, signal polarity detection, and correction. Its internal logic structure is illustrated in Figure 1.

Key features of the DM9000AE include a 148-pin LQFP package, support for 8/16-bit data buses, 10Base-T and 100Base-T compatibility, built-in 16KB SRAM for buffering, IP/TCP/UDP acceleration, back-pressure flow control for half-duplex, IEEE802.3u and IEEE802.3x full-duplex support, a 200ns response time, and low power consumption at 2.5V/3.3V.

Figure 1: Internal Logic Structure of DM9000AE

2.2 Working Principle

The DM9000AE can be connected to a microprocessor via an 8-bit or 16-bit bus and supports simplex or full-duplex operation. Upon power-up, the processor initializes the DM9000AE by configuring internal registers such as the Network Control Register (NCR) and Interrupt Status Register (ISR) through the bus. Once initialized, the DM9000AE enters a waiting state for data transmission.

When the processor needs to send data over the Ethernet, it first encapsulates the data into UDP or IP packets and transmits them byte by byte to the DM9000AE's transmit buffer via the bus. Then, it updates the relevant registers with information such as the data length and sends an enable command. The DM9000AE then processes the buffered data, performs MAC framing, and transmits the data onto the network.

When receiving data from the external network, the DM9000AE first checks the validity of the incoming frame. If the header is incorrect or there is a CRC error, the frame is discarded. Otherwise, the data is stored in the internal SRAM, and an interrupt is generated to notify the processor. The processor then accesses the received data from the DM9000AE’s memory for further processing.

Additionally, the DM9000AE automatically detects the network connection and adjusts the data rate to either 10 Mb/s or 100 Mb/s based on the network speed. It also dynamically adjusts the direction of the data transceiver pins according to the RJ45 interface mode, ensuring normal communication regardless of whether the cable is in straight-through or crossover configuration.

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