Wireless speaker solution based on MAXII
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Conventional speakers require wiring when used, making installation and movement very inconvenient. Therefore, the wireless speaker solution came into being. The early wireless speakers were mostly modulated by infrared and FM carriers. The infrared modulation has high directionality, and the direction of change affects the reception effect. FM analog modulation is not good for interference and confidentiality, and can affect other people's applications. In response to these problems, we have developed a new wireless speaker product that enables wireless transmission of stereo music without the need for wiring and flexibility. The solution is based on the MAXII CPLD development. The MAXII EPM570 is Altera's next-generation CPLD chip that delivers twice the performance, four times the capacity, and one-tenth the power consumption of the previous generation. The scheme adopts FSK carrier modulation in 2.4GHz ISM band, which has strong anti-interference ability and good confidentiality.
The wireless speaker contains two modules for transmitting and receiving. The transmitting module samples the audio signals of the left and right channels through the ADC at 44.1 kHz/16 bit per channel, and performs compression, Hamming coding and data packing by the baseband processing chip MAXII EPM570, and then transmits the signals through the wireless chip modulation. The receiving module receives the digital signal through the wireless chip through the baseband processing chip MAXII EPM570 for data unpacking, error correction and decompression processing, and sends it to the DAC driving earphone or power amplifier through the I 2 S interface.
The data volume per second of the audio signal of the left and right channels is 44.1 kHz × 16 bit × 2 = 1.4112 Mbps after being sampled by the ADC. The Micro Linear ML2724 wireless transceiver chip is modulated by a 2.4G FSK carrier with a maximum transmission rate of 1.536Mbps. Due to the characteristics of wireless communication, auxiliary bits such as synchronization information, error correction code, and frame control word must be added during communication. Therefore, the transmission rate of 1.536 Mbps is not enough, which requires the function of increasing audio data compression. However, the traditional MCU has a low processing speed and cannot meet the requirements. Therefore, we use Altera's MAXII CPLD as the baseband processing chip to complete the fast processing of data. The transceiver modules are powered by a single 5V supply, and the current is less than 200mA when operating at full speed. If the ADC and DAC use a 3.3V chip and the transceiver module operates at 3.3V, the power consumption can be further reduced.
The chip used in the transmitter module mainly includes ADC, SRAM, CPLD, 8-bit MCU, LDO, and RF chip ML2724. After the module is powered on, the MCU initializes the ML2724. The two-channel audio signal is converted to a 16-bit/44.1 kHz data stream in I 2 S format by A/D. The baseband processing chip stores the data as ADPCM compression and Hamming code. Cache in SRAM. The CPLD reads out the data package from the SRAM, and the NRZI code is transmitted through the RF module at intervals of 1.5 ms. Since the CPLD can be processed in parallel, the above operations are performed simultaneously, which greatly reduces the processing delay of the audio signal. The logic block diagram of the transmitting module is shown in Figure 1.
Figure 1: Transmitting block logic block diagram
The chips used in the receiving module mainly include DAC, SRAM, CPLD, 8-bit MCU, LDO, and RF chip ML2724. The RF signal is received by the RF module and converted to a serial digital signal for transmission to the baseband processing chip. After bitwise synchronization, NRZI decoding, Hamming error correction and decompression processing, it is buffered in SRAM. Data taken from the SRAM is processed by the CPLD and then converted to an I 2 S data stream and sent to the DAC for conversion into an audio signal. You can directly drive the headphones to play sound or send them to the audio amplifier to amplify the drive speakers. Class D amplifiers JAM2x020 can also be used instead of DACs and traditional Class A and Class B amplifiers. The logic block diagram of the receiving module is shown in Figure 2.
Figure 2: Receiver block logic block diagram
This solution creatively applies CPLD to consumer audio processing products, giving full play to the advantages of MAXII CPLDs with fast speed, low power consumption and low price, replacing traditional audio baseband processing chips. We have completed ADPCM compression, Hamming codec, I 2 S data conversion, SRAM read and write, and NRZI code encoding and decoding in the baseband processing. To accomplish these functions is hard to imagine in a traditional CPLD.
The solution also uses high-quality ML2724 monolithic integrated transceiver chip hardware to ensure transmission distance, anti-interference ability, and there are 40 channels to choose from. Up to 8-bit address coding, there are 256 kinds of code selection transceiver modules only have the same address code to correctly decode, improve confidentiality and reduce the risk of interference from adjacent modules. Application of NRZI coding and forward error correction methods enhances anti-jamming capability and improves communication quality in software. The solution can realize one-to-one or one-to-many transmission form for wireless transmission of quasi-CD sound quality, and can be widely used in products such as surround sound speakers, portable PC speakers and baby monitors.
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